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74LS76 Dual JK Flip Flop IC
Rs. 49 & Rs. 70 Shipping (FREE Shipping automatically on orders totaling Rs. 499 and above)
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74LS76 Dual JK Flip Flop IC
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74LS76 Dual JK Flip Flop IC

Rs. 49
In stock
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Minimum quantity for "74LS76 Dual JK Flip Flop IC" is 2.

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This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop after a complete clock pulse. While the clock is low the slave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master. While the clock is high the J and K inputs are disabled. On the negative transition of the clock, the data from the master is transferred to the slave. The logic state of J and K inputs must not be allowed to change while the clock is high. The data is transfered to the outputs on the falling edge of the clock pulse. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.

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